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TB62269FTG 1 2014- 3 - 18 toshiba bicd integrated circuit silicon monolithic tb6226 9 ftg pwm method clk - in bipolar stepping motor driver the tb62 269 ftg is a two - phase bipolar stepping motor driver using a pwm chopper. fabricated with the bicd process, the tb622 69 ftg is rated at 40 v/ 1.8 a . the internal voltage regulator allows control of the motor with a single vm power supply. features ? drive contr ol is possible in a bipolar stepping motor at 1 chip. ? pwm controlled constant - current drive ? allows full , half and quarter ,1/8,1 /16,1/32 step resolutions. ? low on - resistance of output stage transistor is low by using bicd process. ? high voltage and current (for specification, please refer to absolute maximum ratings and operation ranges) ? thermal shutdown (tsd) over - current shutdown ( isd), ? and power - on reset of vm power supp l y (por) ? built - in regulator allows the tb622 69 ftg to function with only vm power supply. ? able to customize pwm signal frequency by external resistance/ capacitor . ? packages TB62269FTG : ( p- wqfn48- 0707- 0.50- 003 ) n ote) please be careful about thermal conditions during use . weight:0.14 g (typ.) p - wqfn48 - 0707 - 0.50 - 003
TB62269FTG 2 2014- 3 - 18 pin assignment please mount the four corner pins of the qfn package and the exposed pad to the gnd area of the pcb. ( to p view) 1 2 3 4 5 6 7 8 9 10 11 12 36 35 3 4 33 32 31 30 29 28 27 26 13 14 15 16 17 18 19 20 21 22 23 24 25 48 47 46 45 44 43 42 41 40 39 38 37 tb6226 9 f t g nc clk_in enable reset gnd nc rs_a1 rs_a2 nc out_a1 out_a2 nc nc nc gnd out_a1 - out_a2 - gnd gnd out_b2 - out_b1 - gnd nc nc nc out_b2 out_b1 nc rs_b2 rs_b1 nc vm nc vcc nc nc nc l_out d_mode0 gnd vref_b vref_a oscm cw/ccw mo_out d_mode1 d_mode2 nc
TB62269FTG 3 2014- 3 - 18 block diagram functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes. application notes all the grounding wires of the tb622 69 ftg must run on the solder mask on the pcb and be externally terminated at only one point. also, a grounding method should be considered for efficient heat dissipation. careful attention should be paid to the layout of the output, vdd (vm) and gnd traces, to avoid short circuits across output pins or to the power su pply or ground. if such a short circuit occurs, the TB62269FTG may be permanently damaged. also, the utmost care should be taken for pattern designing and implementation of the TB62269FTG since it has power supply pins (vm, rs, out, gnd) through which a pa rticularly large current may run. if these pins are wired incorrectly, an operation error may occur or the TB62269FTG may be destroyed. the logic input pins must also be wired correctly. otherwise, the TB62269FTG may be damaged owing to a current running t hrough the ic that is larger than the specified current. step decoder (input logic) cw/ccw d_mode1 d_mode2 clk_in enable reset mo_out torque control 5bit d/a (angle control) current level set vref v rs 1 r s comp1 cu rrent feedback ( 2) vm rs vcc voltage regulator vmr d etect vcc osc cr - clk converter chopper osc oscm output control ( mixed decay control ) isd tsd vmr detect output (h - bridge 2) detection circuit vm enable stepping motor d_mode0 l_out
TB62269FTG 4 2014- 3 - 18 pin function tb62269 ftg (qfn48) function explanation of terminal number 1 to 48 pin no. pin name function pin no. pin name function 1 nc no - connect 25 nc no - connect 2 clk _in an electrical angle l eads on the rising edge of the clock input. a motor rotation count depends on the input frequency. 26 out_b2 * b ch positive driver output 3 enable a/b channel output enable 27 out_b1 * 4 reset electric angle reset 28 nc no - connect 5 gnd logic groun d 29 rs_b2 * motor bch current sense pin 6 nc no - connect 30 rs_b1 * 7 rs_a1 * motor ach current sense pin 31 nc no - connect 8 rs_a2 * 32 vm motor power supply 9 nc no - connect 33 nc no - connect 10 out_a1 * a ch positive driver output 34 vcc internal vcc regulator monitor pin 11 out_a2 * 35 nc no - connect 12 nc no - connect 36 nc no - connect 13 nc no - connect 37 nc no - connect 14 nc no - connect 38 l_out error detect signal output 15 gnd motor power ground 39 d_mode 0 step resolution mode control 0 16 ou t_a1 - * a ch negative driver output 40 gnd logic ground 17 out_a2 - * 41 vref_b tunes the current level for b ch motor drive. 18 gnd motor power ground 42 vref_a tunes the current level for a ch motor drive. 19 gnd motor power ground 43 osc m oscillator pin for pwm chopper 20 out_b2 - * b ch negative driver output 44 cw/ccw motor rotation: forward/reverse 21 out_b1 - * 45 mo_out electric angle monitor 22 gnd motor power ground 46 d_mode 1 step resolution mode control 1 23 nc no - connect 4 7 d_mode 2 step resolution mode control 2 24 nc no - connect 48 nc no - connect ? please use the pin of nc with open. * please connect the pins with the same names, at the nearest point of the device.
TB62269FTG 5 2014- 3 - 18 clk function the electrical angle leads one by one in the manner of the clocks. the clock signal is reflected to the electrical angle on the rising edge. clk input function rise the electrical angle leads one by one on the rising edge. fall remains at the same position. enable function the enable pin contro ls whether the current is allowed to flow through a given phase for a stepper motor drive. this pin selects whether the motor is stopped in off mode or activated. the pin must be fixed to low at power - on or power - down of the tb622 69 ftg. enable input funct ion h output transistors are enabled (normal operation mode). l output transistors are disabled (high impedance state). cw/ccw function the cw/ccw pin controls the rotation direction of the motor. when set to clockwise, the current of outa is output first, with a phase difference of 90. when set to counter clockwise, the current of outb is output first with a phase difference of 90. cw/ccw input function out (+) out ( -) h clock - wise h l l counter clock - wise l h
TB62269FTG 6 2014- 3 - 18 step resolution mode select fu nction d_mode 0 d_mode1 d_mode2 function l l l standby mode osc m, output transistors are disabled , full step setting l l h full step l h l half step (a) l h h quarter step h l l half step (b) h l h 1/8 step h h l 1/16 step h h h 1/32 step change of d_mode 0 , d_ mode 1 and d_mode 2 recommends changing, after setting reset to low in the state of an initial (mo_out = low) . reset function reset input function h the electrical angle is reset. l normal operation mode phase current s when reset is applied are as follows: in this case, the terminal mo_out becomes low. step resolution a aspect current b aspect current electric angle full step 100% 100% 45 half step 100% 100% 45 quarter step 71% 71% 45 1/8 step 71% 71% 45 1/16 step 71% 71% 45 1/32 step 71% 71% 45
TB62269FTG 7 2014- 3 - 18 output function of reset signal the l_out pin will show low level when an error occation(tsd/isd) is detected. the lo is an open - drain output pin. lo pin needs to be pulle d up to 3.3v/5.0v level for proper function. during regular operation, the lo pin level will stay high(vcc level). when error detection (tsd, isd) is applied, the lo pin will show low (gnd) level. vcc level 1 0 k l_out
TB62269FTG 8 2014- 3 - 18 absolute maximum ratings (ta = 25 c ) characteristics sym bol rating unit remarks motor power supply vm 40 v - motor output voltage vout 40 v - motor output current iout 1.8 a (note 1) logic power supply vcc 6 .0 v when externally applied. digital input voltage vin 6 .0 v - mo ,l_out output voltage vmo ,vl_out 6 .0 v - mo ,l_out inflow current imo ,il_out 30.0 ma - power dissipation pd 1.3 w (note 2) operating temperature topr - 20 to 85 c - storage temperature tstr - 55 to 150 c - junction temperature tj(max) 150 c - note 1: as a guide, the maximum output current should be kept below 1. 4 a per phase. the maximum output current may be further limited in view of thermal considerations, depending on ambient temperature and board conditions. note 2: stand - alone (ta =25c) when ta exceeds 25c , it is necess ary to do the de le ting with 10.4mw/ c . ta: ambient temperature topr : ambient temperature while the TB62269FTG is active tj: junction temperature while the TB62269FTG is active. the maximum junction temperature is limited by the thermal shutdown (t sd) circuitry. it is advisable to keep the maximum current below a certain level so that the maximum junction temperature, tj (max), will not exceed 120c. caution absolute maximum ratings the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating (s) may cause device breakdown, damage or deteriora tion, and may result in injury by explosion or combustion. the value of even one parameter of the absolute maximum ratings should not be exceeded under any circumstances. the TB62269FTG does not have overvoltage detection circuit . therefore, the device is damaged if a voltage exceeding its rated maximum is applied. all voltage ratings, including supply voltages, must always be followed. the other notes and considerations described later should also be referred to.
TB62269FTG 9 2014- 3 - 18 operation ranges ta=0 to 85c characteristics symbol min typ. max unit remarks motor power supply vm 10 .0 24 .0 38 .0 v motor output current iout - 1. 4 1. 8 a 1 phase , (note 1) digital input voltage vin( ) 2.0 - 5.5 v logic input high level vin( ) - 0.4 - 1.0 v logi c input low level mo ,l_out output pin voltage vmo ,vl_out - 3.3 5.5 v pull - up voltage clock input frequency fclk - - 1 00 khz chopper frequency fchop 40 100 150 khz vref reference voltage vref gnd - 3.6 v sensing resistance contact button voltage vrs 0.0 1.0 1.5 v vm terminal standard , note 2 note 1: maximum current for actual usage may be limited by the operating circumstances such as operating conditions ( exciting mode, operating time, and so on) , ambient temperature, and heat conditions ( bo ard condition and so on). note 2 : maximum voltage of vrs must not be exceeded the absolute maximum rating.
TB62269FTG 10 2014 - 3 - 18 electrical characteristics 1 (ta = 25 c, vm = 24 v, unless otherwise specified ) characteristics symbol test condition min typ. max unit digital input voltage vih digital input pins (note) 2.0 3.3 5. 5 v vil 0 - 0.8 input hysteresis voltage vin(h ys) digital input pins (note) 100 200 300 mv digital input current high iin(h) vin = 5 v at the digital input pins under test 35 50 75 a low iin(l) v in = 0 v at the digital input pins under test - - 1 .0 a mo output voltage high voh(mo) ioh = - 24 ma when the output is high 2.4 - - v low vol(mo) iol = 24 ma when the output is low - - 0.5 v supply current im1 outputs open, in standby mode - 2.5 3 . 5 ma im2 outputs open, enable = low - 4.0 5 .5 ma im3 outputs open ( full step ) - 5 7 ma output leakage current high - side ioh vrs = vm = 40 v, vout = 0 v - - 1 a low - side iol vrs = vm = vout = 40 v 1 - - a channel -to - channel differential iout1 channel -to - channel error -5 0 5 % output current error relative to the predetermined value iout2 iout = 1.0a -5 0 5 % rs pin current irs vrs = vm = 24v, dmode_0,1,2 = l enable = l 0 - 27.0 a drain - source on - resistance of the output transistors (upper and lower sum) ron(d -s) iout = 2 .0a , tj = 25c - 0.8 1.2 note: vin (h) is defined as the vin voltage that causes the outputs (outa,outb) to change when a pin under test is gradually raised from 0 v. v in (l) is defined as the v in voltage that c auses the outputs (outa, outb) to change when the pin is then gradually lowered from 5v . the difference between v in (h) and v in (l) is defined as the v in (hys) .
TB62269FTG 11 2014 - 3 - 18 electrical characteristics 2 (ta = 25 c, vm = 24 v, unless otherwise specified ) characteristi cs symbol test condition min typ. max unit vref input current iref vref = 3.0 v - 0 1.0 a vref decay rate vref (gain) vref = 2.0 v 1/4.8 1/5.0 1/5.2 tsd threshold (note 1)) tjtsd - 140 150 170 c vm recovery voltage vmr modes other than standby mode 7.0 8.0 9.0 v overcurrent trip threshold (note 2) isd - 2 .0 3 .0 4 .0 a power - supply vol tage for internal circuit operation vcc icc=5.0ma 4.75 5.0 0 5.25 v note 1 : thermal shutdown (tsd) circuitry when the junction temperature of the device reaches the threshold, the tsd circuitry is tripped, causing the internal reset circuitry to turn off the output transistors. the tsd circuitry is tripped at a temperature between 140c (min) and 170c (max). once tripped, the tsd circuitry keeps the output transistors off until the tsd circuitry is released. the tsd status is released once the TB62269FTG i s rebooted or all the d_modepins (d _ mode0,1,2) are switched to low (set to standby status) . the tsd circuitry does not necessarily guarantee the complete safety of the device; therefore d o not use t he tsd circuitry actively . note 2 : overcurrent shutdown (isd ) circuitry when the output current reaches the threshold, the isd circuitry is tripped, causing the internal reset circuitry to turn off the output transistors.to prevent the isd circuitry from being tripped owing to switching noise, it has a masking time of four cr oscillator cycles. once tripped, it takes a maximum of four cycles to exit isd mode and resume normal operation.the isd circuitry remains active until all the d_mode (dmode_0,1,2) pins are switched to low or the TB62269FTG is rebooted. the tb622 69ftg remains in standby mode while in isd mode. note 3 : when the power supply voltage (v cc ) for operating internal circuit is divided by the external resistor and used as vref input voltage, the accuracy of the output current setting value becomes 8% t ogether with the vcc output voltage accuracy and the vref decay ratio accuracy . note 4: even when the logic input signal is input under the condition that the vm voltage is not supplied, the electromotive force and the leakage current by the signal input are not generated. however, before vm is rebooted, logic input signal should be controlled not to let the motor operating by rebooting vm. back - emf while a motor is rotating, there is a timing at which power is fed back to the power supply. at that timin g, the motor current is fed back to the power supply owing to the effect of the motor back - e m f. if the power supply does not have enough sink capability, the power supply and output pins of the device might rise above the rated voltages. the magnitude of t he motor back - emf varies with usage conditions and motor characteristics. it must be fully verified that there is no risk that the tb62 269ftg or other components will be damaged or fail owing to the motor back - e m f. cautions on overcurrent shutdown (isd) a nd thermal shutdown (tsd) the isd and tsd circuits are only intended to provide temporary protection against irregular conditions such as an output short circuit; they do not necessarily guarantee complete ic safety. if the device is used beyond the specif ied operating ranges, these circuits may not operate properly: then the device may be damaged owing to an output short circuit. the isd circuit is only intended to provide temporary protection against an output short circuit. if such a condition persists f or a long time, the device may be damaged owing to overstress. overcurrent conditions must be removed immediately by external hardware. ic mounting do not insert devices in the wrong orientation or incorrectly. otherwise, it may cause device breakdown, da mage and/or deterioration.
TB62269FTG 12 2014 - 3 - 18 ac electrical characteristics (ta = 25 c, v m = 24v , 6.8 mh/5.7 ) characteristics symbol test condition min typ. max unit logic input frequency f clk fosc =1600khz 1.0 - 100 khz width of minimum clock pulse high tclk(h) the input high period which carries out a high output 300 - - ns low tclk(l) the input low period which carries out a low output 250 - - output transistor switching characteristic tr - 150 200 250 ns tf - 100 150 200 ns tplh(clk) clk signal to out - 1000 - ns tphl(clk) clk signal to out - 1500 - ns blanking time for current spike prevention t blank iout = 1 .0a 450 7 00 950 ns osc_m oscillation frequency fosc cosc = 270 pf, rosc = 3.6 k 1200 1600 2000 khz chopper frequency rang e fchop( range ) output operation (iout = 1 .0a) 3 0 100 150 khz chopp er setting frequency fchop output operation (iout = 1 .0a) f osc = 1600khz - 100 - khz isd masking time tisd(mask) after isd threshold is exceeded owing to an output short circuit to power or ground mask time is counted by clk of oscm. - 4 - - isd on - time tisd - - 8 timing charts of output transistors switching timing charts may be simplified for explanatory purposes. clk tplh tphl vm gnd tr tf 10% 50% 90% 90% 50% 10% 90% 50% 10% output voltage 50% 1/ fclk 10%
TB62269FTG 13 2014 - 3 - 18 mixed decay mode / detecting zero point note: when the motor current reaches the 0a level, the output transistor will tu rn to hi-z status. f chop cr pin internal clk waveform rnf 37.5% mixed decay mode rnf setting current nf decay m ode 1 charge mode nf: reach setting current slow mode mixed decay timming fast mode monitor ing current (in case setting current > outputting current) charge mode mdt charge slow fast note iout=0 charge slow fast hi-z
TB62269FTG 14 2014 - 3 - 18 output transistor operating modes output transistor function clk u1 u2 l1 l2 charge on off off on slow - decay mode off off on on fast - d ecay mode off on on off no te: this table shows an example of when the current flows as indicated by the arrows in the figures shown above. if the current flows in the opposite direction, refer to the following table. clk u1 u2 l1 l2 charge off on on off slow - decay mode off off on on fast - d ecay mode on off off on the tb622 69f t g switches among charge, slow - decay and fast - decay modes automatically for constant - current control. the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. charge mode a current flows into the motor coil. slow - decay mode a current circulates around the motor coil and this device. fast - decay mode the energy of the motor coil is fed back to the power u1 l1 u2 l2 pgnd off off u1 l1 u2 l2 off on on load pgnd u1 l1 u2 l2 load pgnd r s pin r rs v m on on load on r s pin r rs v m r s pin r rs v m off off on off
TB62269FTG 15 2014 - 3 - 18 calculation of the setting output current for pwm constant - current control, the TB62269FTG uses a clock generated by the cr oscillator. the peak output current can be set via the current - sensing resistor (r rs ) and the reference voltage (v ref ), as follows: vref(v) iout(max) = vref(gain) x r rs ( ) vref(gain) : vref decay ratio is 1 / 5.0 (typ.) . ex.) : in case of 100% setting, when vref = 3.0 v , torque = 100% , and rs = 0.51 , constant current output of the motor (peak current) is calculated as f ollows; i out = 3.0v / 5.0 / 0.51 = 1.18 a . calculation of the oscm oscillation frequency (chopper reference frequency) oscm oscillation frequency (foscm) and chopper frequency (fchop) are computable in the following expressions. f oscm=1/[0. 56 x{cx(r1+5 00)}] c, r1 : external constant for oscm (c=270pf , r1=3.6k ? ) fchop = foscm / 16 because the loss of the gate in ic rises, generation of heat grows though wavy reproducibility goes up because the pulsating flow of the current decreases when the chopper frequency is raised. there is a possibility of the current pulsating flow increasing though a decrease in generation of heat can be expected by lowering the chopper frequency. the thing set within the range of the frequency from 50 to about 100 khz based on the frequency generally of about 70 khz is recommended.
TB62269FTG 16 2014 - 3 - 18 ic power consumption the power consumed by the TB62269FTG is approximately the sum of the following; 1) the power consumed by the output transistors, and 2) the power consumed by the digital logic portion. 1. power consumption of output transistors using the r on (upper + lower) value of 1.0 the power of the output transistors is consumed by upper and lower h - bridge. the power consumed by each h - bridge is given by: p (out) = iout (a) vds (v) = iout (a) ^2 ron ( ) ............................................................................... (1) in full step mode (in which two phases have a phase difference of 90), the average power consumption in the output transistors is calculated as follows: ron = 1.0 , iout ( peak: max) = 1.0 a, vm = 24 v p (out) = 2 (tr) 1.0 (a) ^ 2 1 .0 ( ) ....................................................................................................... (2) = 2.0 (w) 2. power consumption of logic portion and im domain the power consumption of logic portion and the im domain is calculated separately for normal operation and standby modes. i (im3) = 5 ma (typ.) : normal ope ration mode /1 axis i (im2) = 3.5 ma (typ.) : standby mode the output domain is connected to vm (24v) . it consists of the digital logic connected to v m (24 v) and the network affected by the switching of the output transistors. the total power consumed by im can be estimated as: p (im) = 24 (v) 0.0 0 5 (a) .................................................................................................................... (3) = 0. 12 (w) 3. power consumption hence, the total power consumption of the TB62269FTG is: p = p (out ) + p (im) = 2. 12 (w) the standby power consumption per axis is given by: p ( standby ) = 24 (v) 0.0035 (a) = 0.084 (w) board design should be fully verified, taking thermal dissipation into consideration.
TB62269FTG 17 2014 - 3 - 18 timing charts of clk, output current and mo output timing charts may be simplified for explanatory purposes. mo output shown in the timing chart is when the mo pin is pulled up. a phase b phase mo output a phase b phase mo output a phase b phase mo output clock input half step quarter step full step
TB62269FTG 18 2014 - 3 - 18 phase sequences full step resolution half step resolution quarter step resolution ? 150 ? 1 0 0 ? 5 0 50 1 00 150 0 ? 150 ? 1 0 0 ? 50 50 1 00 150 0 b phase a phase ccw cw initialize positio n mo output: low ? 150 ? 10 0 ? 50 50 1 00 150 0 ?150 ?100 ?50 50 100 150 0 b phase a phase ccw cw initialize position mo output: low ccw cw initialize position mo output: low a phase ? 150 ? 1 0 0 ? 50 50 1 00 150 0 ? 1 50 ? 1 0 0 ? 50 50 1 00 150 0 b phase
TB62269FTG 19 2014 - 3 - 18 half step resolution ? ia(%) ib( %) 0 71 100 100 71 b phase a phase clk mo 0 100 - 100 71 - 71
TB62269FTG 20 2014 - 3 - 18 1/8 step resolution clk 100% 98% 92% 83% 71% 56% 38% 20% - 20% - 38% - 56% - 71% - 83% - 92% - 98% - 100% mo ia(%) ib( %) 0 71 100 100 71 0%
TB62269FTG 21 2014 - 3 - 18 1/16 step resolution clk 10 0 71 0 - 7 1 - 100 mo ia(%) ib( %) 100 98 96 92 88 83 77 71 0 10 20 29 38 47 56 63 10 20 71 29 38 47 56 63 100 98 96 92 88 83 77
TB62269FTG 22 2014 - 3 - 18 1/32 step resolution clk 0 mo 100% - 100% ia(%) ib( %) 100 98 96 92 88 83 77 71 0 10 20 29 38 47 56 63 10 20 71 29 38 47 56 63 100 98 96 92 88 83 77
TB62269FTG 23 2014 - 3 - 18 example application circuit s the values shown in the following figure are typical values. for input conditions, see the operating ranges. note: i will recommend the addition of a capacitor if necessary. the gnd wiring must become one point as much as possib le - earth. the example of an applied circuit is for reference, and enough evaluation should be done before the mass - production design. moreover, it is not the one to permit the use of the industrial property. 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 clk - in enable reset gnd rs_a 1 rs_a 2 o ut_a1 o ut_a2 gnd out_a 1- out_a 2- gnd gnd out_b 2- ou t_b 1- gnd out_b 2 o ut_b1 rs_b 2 rs_b 1 vm vcc gnd vref_b vref_a oscm cw/ccw mo_out d _mode 1 d _mode2 5v 0 v 5v 0 v 5v 0 v m 0. 51 0. 51 0.1 f 100 f 0.1 f 0.1 f 5v 0 v 270p f 3.6k 5v 0 v 5v 0 v 5v l_out d_ mode0 5v 0 v
TB62269FTG 24 2014 - 3 - 18 package dimensions p - wqfn48 - 0707 - 0.50 - 003 unit: mm . foot pattern example ( double - sided board ) surface bottom white dots: 0.2 mm through holes
TB62269FTG 25 2014 - 3 - 18 no tes on contents block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them m ay be omitted for explanatory purposes. timing charts timing charts may be simplified for explanatory purposes. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required , especially at the mass - production design stage. toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. test circuits components in the test circuits are used only to obtain and confirm t he device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics (1) the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings.exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or combustion. (2) use an ap propriate power supply fuse to ensure that a large current does not continuously flow in the case of overcurrent and/or ic failure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead to smoke or ignition. to minimize the effects of the flow of a large current in the case of breakdown, approp riate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or break down caused by the current resulting from the inrush current at power on or the negative current resulting from the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built - in pr otection functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. (4) do not insert devices in the wrong orientation or incorrectly. make sure that the p ositive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or combustion. in addition, do not use any device inserted in the wrong orientation or incorrectly to which current is applied even just once. (5) carefully select external components (such as inputs and negative feedback capacitors) and l oad components (such as speakers), for example, power amp and regulator. if there is a large amount of leakage current such as from input or negative feedback condenser, the ic output dc voltage will increase. if this output voltage is connected to a speak er with low input withstand voltage, overcurrent or ic failure may cause smoke or ignition. (the overcurrent may cause smoke or ignition from the ic itself.) in particular, please pay attention when using a bridge tied load (btl) connection - type ic that in puts output dc voltage to a speaker directly.
TB62269FTG 26 2014 - 3 - 18 points to remember on handling of ic s overcurrent detection circuit overcurrent detection circuits (referred to as current limiter circuits) do not necessarily protect ics under all circumstances. if the overc urrent detection circuits operate against the overcurrent, clear the overcurrent status immediately. depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the overcurrent detection circuit to operate improperly o r ic breakdown may occur before operation. in addition, depending on the method of use and usage conditions, if overcurrent continues to flow for a long time after operation, the ic may generate heat resulting in breakdown. thermal shutdown circuit therma l shutdown circuits do not necessarily protect ics under all circumstances. if the thermal shutdown circuits operate against the over - temperature, clear the heat generation status immediately. depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the thermal shutdown circuit to operate improperly or ic breakdown to occur before operation. heat radiation design when using an ic with large current flow such as power amp, regulator or driver, design the device so th at heat is appropriately radiated, in order not to exceed the specified junction temperature (tj) at any time or under any condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrease in ic life, de terioration of ic characteristics or ic breakdown. in addition, when designing the device, take into consideration the effect of ic heat radiation with peripheral components. back - emf when a motor rotates in the reverse direction, stops or slows abruptly, current flows back to the motors power supply owing to the effect of back - emf. if the current sink capability of the power supply is small, the devices motor power supply and output pins might be exposed to conditions beyond the absolute maximum ratings . to avoid this problem, take the effect of back - emf into consideration in system design.
TB62269FTG 27 2014 - 3 - 18 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the i nformat ion in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission , reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standar ds and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, includi ng data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba informa tion, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instruct ions for the appli cation with which the product will be used with or for. customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such d esign or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, d iagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted for use in equipments or systems that require extraordinarily high levels of quality and/ or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to con trol combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance - related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse - engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any products or systems whose manufactur e, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is presented only as guidance for product use. no responsibility is assumed by toshiba for a ny infringement of patents or any other intellectual prop erty rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provided i n the relevant terms and conditions of sale for product, and to the maximum extent allowabl e by law, toshiba (1) assumes no liability whatsoever, including without limitation, indirect, consequential, special, or incidental damages or loss, including without limitation, loss of profits, loss of opportunities, business interruption and loss of da ta, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringe m e n t. ? do not use or otherwise make available product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). product and related software and technology may be controlled under the applicable expor t laws and regulations including, without limitation, the japanese foreign exchange and foreign trade law and th e u.s. export administration regulations. export and re - export of product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. ? please contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of product. please use product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled su bstances, including without limitation, the eu rohs directive. toshiba assumes no liability for damages or losse s occurring as a resul t of noncompliance w ith applicable laws and regulations.

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